A conventional driver circuit comprises:
an output terminal for connection to a bus line; PA1 a first supply terminal for connection to a first voltage source; and PA1 first drive means for in a first state of the driver circuit completing a current path from the output terminal to the first supply terminal for passage of an output current; and PA1 control means for supplying a control current to the first drive means. PA1 an output terminal for connection to a bus line; PA1 a first supply terminal for connection to a first voltage source; PA1 first drive means for in a first state of the driver circuit completing a current path from the output terminal to the first supply terminal for passage of an output current; PA1 an output diode connected in the path of the output current for isolating the first drive means from the output terminal in a second state of the driver circuit; and PA1 pre-biasing means for applying a reverse bias to the output diode before connection of the output terminal to the bus line.
Such a circuit can cause a desired voltage swing on the bus line in a time period determined by the capacitance of the bus line, the magnitude of the voltage swing and the magnitude of the output current. Three measures that can be used to increase the speed of communication ar (i) to increase the current capability of the drive means, (ii) to reduce the bus line capacitance and (iii) to reduce the voltage swing required.
An example of a standard bus system which seeks higher operating speeds by a combination of these three measures is the Futurebus+ system, defined by IEEE Standard 896.1. Many other standard and proprietary bus systems have sought to provide high-speed communication by one or more of these means, and will continue to do so into the future.
In such systems, ever higher output currents are specified. The power dissipation (heat) which inevitably results from these high currents becomes a constraint when it is desired to include one or more driver circuits in a single integrated circuit (chip). Additional power dissipation arises from control circuitry and can make this constraint more severe. For example, bipolar transistors make compact, high-current drive means, but demand substantial control currents to keep them turned on. The power dissipation involved in supplying these control currents can amount to a significant portion of the total power dissipation of the chip.
When an individual driver circuit is not active, it becomes part of the load for the other driver circuits connected to the bus line. Unfortunately, high-current drive means, and bipolar transistors especially, tend to have large output capacitances. Coupling these capacitances to the bus line negates the speed advantage gained from the higher output current. Ideally, output capacitances of individual circuits should make only a minor contribution to the overall capacitance of the bus line, so that bus line performance is independent of the number of module connected.
A further consequence of the output capacitance of a driver circuit is that the driver cannot be connected to a "live" bus line (that is, one on which other drivers and receivers are communicating) without introducing some noise on the bus line. A new circuit module suddenly connected to a live bus line can therefore result in loss of data for other modules, or even total system failure. Since many modular data processing systems are used in critical, real-time applications such as process control and telephone switching, live insertion of new modules is desirable, while the consequences of data loss or system failure can be very serious. Note that reducing the voltage swing between the logic levels on the bus line increases speed only at the expense of reducing the inherent noise immunity of the receiving modules.
U.S. Pat. No. 4 415 817 describes a logic circuit including a bipolar drive transistor, a bipolar control transistor, and a plurality of output diodes. Each output diode carries an output current to the input of a respective further logic circuit. The output diodes are provided to isolate these further circuits from one another, and to provide a high "fanout" of the logic circuit (the number of inputs that can be driven by the logic circuit).